SUBHASISH MITRA

 

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Associate Professor

Department of Electrical Engineering and Department of Computer Science

Stanford University

 

Address:

Gates Building, Room 334

353 Serra Mall, Stanford, CA 94305

 

Email: subh at stanford dot edu

Phone: 650-724-1915

 

Admin: Beverly Davis

Email: beverlyd at stanford dot edu

Office: Gates Building, Room 336

Phone: 650-723-1458

Fax: 650-725-6949

 

Research interests: Robust system design, VLSI design, CAD, validation & test, computer architecture, Emerging nanotechnologies

 

Biography:

Professor Subhasish Mitra directs the Robust Systems Group in the Department of Electrical Engineering and the Department of Computer Science of Stanford University, where he is the Chambers Faculty Scholar of Engineering. Prior to joining Stanford, he was a Principal Engineer at Intel Corporation. He received Ph.D. in Electrical Engineering from Stanford University.

 

Prof. Mitra's research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies.  His X-Compact technique for test compression has been used in more than 50 Intel products, and has influenced major Electronic Design Automation tools.  The IFRA technology for post-silicon validation, created jointly with his student, was characterized as "a breakthrough" in a Research Highlight in the Communications of the ACM (CACM). His work on the first demonstration of carbon nanotube imperfection-immune digital VLSI, jointly with his students and collaborators, was selected by the National Science Foundation (NSF) as a Research Highlight to the United States Congress, and was highlighted "as a significant breakthrough" by the Semiconductor Research Corporation (SRC), the MIT Technology Review, the New York Times, and several others.

 

Prof. Mitra's honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the highest United States honor for early-career outstanding scientists and engineers, Terman Fellowship, IEEE CAS/CEDA Pederson Award for the best paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Intel Divisional Recognition Award "for a breakthrough soft error protection technology," and the Intel Achievement Award, Intel’s highest corporate honor, "for the development and deployment of a breakthrough test compression technology."  He and his students presented award-winning papers at several major conferences: IEEE/ACM Design Automation Conference, IEEE International Test Conference, IEEE VLSI Test Symposium, Intel Design and Test Technology Conference, and the Symposium on VLSI Technology. At Stanford, he was honored several times by graduating seniors "for being important to them during their time at Stanford."

 

Prof. Mitra has served on numerous conference committees and journal editorial boards. Recently, he served on the Defense Advanced Research Projects Agency's (DARPA) Information Science and Technology (ISAT) Board as an invited member. He is a Fellow of the IEEE.