Department of Electrical Engineering and Department of Computer Science
Gates Building, Room 334
353 Serra Mall, Stanford, CA 94305
Email: subh at stanford dot edu
Admin: Beverly Davis
Email: beverlyd at stanford dot edu
Office: Gates Building, Room 336
Research interests: Robust system design, VLSI design, CAD, validation & test, computer architecture, Emerging nanotechnologies
Professor Subhasish Mitra directs the Robust Systems Group in the Department of Electrical Engineering and the Department of Computer Science of Stanford University, where he is the Chambers Faculty Scholar of Engineering. Prior to joining Stanford, he was a Principal Engineer at Intel Corporation. He received Ph.D. in Electrical Engineering from Stanford University.
Prof. Mitra's research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies. His X-Compact technique for test compression has been key to cost-effective manufacturing and high-quality testing of a vast majority of electronic systems, including numerous Intel products. X-Compact and its derivatives have been implemented in widely-used commercial Electronic Design Automation tools. The QED and IFRA techniques, created jointly with his students, have shown outstanding results in overcoming critical bottlenecks in post-silicon validation and debug for several commercial hardware platforms, and have been characterized as "breakthrough" in a Research Highlight in the Communications of the ACM (CACM). His work on carbon nanotube imperfection-immune digital VLSI, jointly with his students and collaborators, resulted in the demonstration of the first carbon nanotube computer, and it was featured on the cover of NATURE. The National Science Foundation (NSF) presented this work as a Research Highlight to the United States Congress, and it also was highlighted as "an important, scientific breakthrough" by the BBC, Economist, EE Times, IEEE Spectrum, MIT Technology Review, New York Times, Scientific American, Time, Wall Street Journal, Washington Post, and numerous other organizations worldwide.
Prof. Mitra's honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the highest United States honor for early-career outstanding scientists and engineers, IEEE CAS/CEDA Pederson Award, and the Intel Achievement Award, Intelís highest corporate honor, "for the development and deployment of a breakthrough test compression technology." He and his students published several award-winning papers at major venues on a wide range of topics spanning robust systems, VLSI design, validation and test, and nanotechnologies: IEEE/ACM Design Automation Conference, IEEE International Solid-State Circuits Conference, IEEE International Test Conference, IEEE Transactions on CAD, IEEE VLSI Test Symposium, Intel Design and Test Technology Conference, and the Symposium on VLSI Technology. At Stanford, he has been honored several times by graduating seniors "for being important to them during their time at Stanford."
Prof. Mitra has served on numerous conference committees and journal editorial boards. Recently, he served on the Defense Advanced Research Projects Agency's (DARPA) Information Science and Technology (ISAT) Board as an invited member. He is a Fellow of the IEEE.