AWARDS AND HONORS:

Okawa Foundation Research Grant, The Okawa Foundation for Information and Telecommunications, Japan, 2009.

Research Highlight by the ACM, Special Invited Feature Article in the Communications of the ACM, 2009.

Invited Participant, National Academy of Engineering, US Frontiers of Engineering Symposium, 2009.

Presidential Early Career Award for Scientists and Engineers (PECASE), "the highest honor bestowed by the United States government on outstanding scientists and engineers beginning their independent careers," 2008.

Best Paper Award, IEEE/ACM Design Automation Conference, 2008.

ACM SIGDA Outstanding New Faculty Award, 2008.

Honor for Ph.D. student: Student Best Paper Award, VLSI Technology Symp., 2008.

CAREER Award, National Science Foundation, 2007.

IBM Faculty Award, 2006, 2007, 2008.

Terman Fellow, 2006.

Top 10 papers at the IEEE International Test Conference, 2002, 2006.

IEEE Circuits and Systems Society Donald O. Pederson Outstanding Paper Award recognizing the Best Paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2005.

Best Paper Award, Intel Design and Test Technology Conference, 2005 for the paper "Built-In Soft Error Resilience Structures."

S. Seshu Scholar Lecturer, Coordinated Science Laboratory, University of Illinois at Urbana-Champaign, 2005.

Divisional Recognition award, Intel Corp., “For Breakthrough Soft Error Protection Technology for Flip-flops,” 2005.

Intel Achievement Award, Intel’s highest corporate honor, “For the development and deployment of a breakthrough test compression technology that improved scan test cost by an order of magnitude,” 2004. (Pictures: http://www.stanford.edu/~subh/iaa.html).

Best panel award, IEEE VLSI Test Symposium, 2002, 2006.

PLENARY / INVITED CONFERENCE TALKS:

Invited speaker, Design Automation and Test in Europe, 2010
Invited speaker, International Conference on VLSI Design, 2010
Invited speaker, LSI Test and Verification Symposium, University of Tokyo, 2009
Dinner Speaker, IEEE International Workshop on Logic synthesis, 2009
International Test Conference, 2009
Symposium on Dependable VLSI, Japan Society for the Promotion of Science (JSPS), 2009
Design Automation and Test in Europe, 2009
Distinguished Speaker Series, IEEE Council of EDA (CEDA), 2009
IEEE/ACM Asia-Pacific Design Automation Conference, 2009
Keynote speaker, EDA Forum, Dresden, Germany, 2008
Plenary speaker, IBM P = ac^2 Conference, 2008
Special Symposium on LSI Testing and Verification, University of Tokyo, Japan, 2008
Foundations of Nano (FNANO), 2008
New Frontiers in Nanoscale Electronics, EPFL, Switzerland 2008
IEEE/ACM Design Automation and Test in Europe, 2008
IEEE International On-line Test Symposium, 2008
IEEE International Reliability Physics Symposium, 2008
IEEE International Symposium on Quality Electronic Design, 2008
IEEE International Integrated Reliability Workshop (IRW), 2008
IEEE International Test Conf., 2007
IEEE VLSI Design and Test Symposium (India), 2007
IEEE International On-line Test Symposium, 2007
New Frontiers in Nanoscale Electronics, EPFL, Switzerland 2007
IEEE MPSoC 2007
IEEE International Conference on Integrated Circuit Design Technology, 2007
Cisco High Availability Workshop, 2006
IFIP / IEEE SOC-VLSI Conference, 2006
IEEE International Workshop on High Performance Computing Reliability Issues, 2006
IEEE/ACM Design Automation Conference, 2005
IEEE VLSI Test Symposium, 2005
IEEE International Conf. Computer Design, 2003
NASA/DoD International Conf. Evolvable Hardware, 2002