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Research projects

Color barcodes

Two dimensional barcodes, such as the QR code or the Aztec, code have slowly started to gain popularity in a variety of applications. For example QR codes are placed on printed advertisements to provide users with links to company's or product's website, Aztec codes are frequently used by airline companies as boarding passes. Despite the fact that digital cameras inherently acquire color images, all current barcode designs are monochrome. We are proposing an entire framework that allows a three fold increase of a barcode capacity by using color. A color barcode is created by printing three independent monochrome codes in overlay using subtractive primaries: cyan, magenta and yellow. This approach is very versatile and applicable to any monochrome barcode design currently in use. Our studies demonstrate that the scheme is robust and can be reliably used in mobile applications.

Color QR code

Barrel distortion removal

Digital cameras have become omnipresent in our daily lives. They have evolved from standalone devices and migrated into other products such as mobile phones, laptops or TVs. This proliferation, together with the Internet connectivity, could help share the surrounding world with friends and relatives. However, while the human visual system covers a 180 degree field of view, typical modern day cameras span only about 70 degrees. Although specialized optical solutions exist, for example wide-angle or fish-eye lenses, they introduce significant amounts of geometric image distortion. Software based correction methods, efficient as they are, increase the the overal system complexity and cost. For high volume, low cost applications, hardware based solutions are ideal candidates. In this project we are analyzing FPGA based architectures optimized for low logic ressources utilization and faithful color restoration of YUV 4:2:0 color encoding schemes.

Geometric distortion

Low-power FPGA design

Application Specific Integrated Circuits (ASICs), due to tailored design, are much faster and more energy efficient than general purpose processors. Their design, as opposed to microprocessors, does not allow any functionality changes. The best of the two worlds is combined in Field Programmable Gate Arrays (FPGAs), which offer fast operation together with reprogramability. Unfortunately, however, these advantages come at a price of incresed power consumption. In this project the applicability and efficiency of standard power reduction techniques, such as clock gating; or signal transition aware encoding, are evaluated on high-performance FPGAs.