Publications

2012
Delimitrou, C., and C. Kozyrakis, "The Netflix Challenge: Datacenter Edition", Computer Architecture Letters, 2012.  Download: paper (624.56 KB)
Malladi, K. T., B. C. Lee, F. A. Nothaft, C. Kozyrakis, K. Periyathambi, and M. Horowitz, "Towards Energy-proportional Datacenter Memory with Mobile DRAM", Proceedings of the 39th Annual International Symposium on Computer Architecture, Washington, DC, USA, IEEE Computer Society, pp. 37–48, 2012.  Download: paper (5.08 MB)
2011
Delimitrou, C., S. Sankar, K. Vaid, and C. Kozyrakis, "Decoupling Datacenter Studies from Access to Large-Scale Applications: A Modeling Approach for Storage Workloads", IEEE International Symposium on Workload Characterization (IISWC), Austin, TX, 11/2011.  Download: paper (3.25 MB); slides (2.07 MB)
Sanchez, D., D. Lo, R. Yoo, J. Sugerman, and C. Kozyrakis, "Dynamic Fine-Grain Scheduling of Pipeline Parallelism", Proceedings of the 20th Intl. Conference on Parallel Architecture and Compilation Techniques (PACT), Galveston Island, TX, 10/2011.  Download: PDF (336.92 KB)
Delimitrou, C., S. Sankar, B. Khessib, K. Vaid, and C. Kozyrakis, "Time and Cost-Efficient Modeling and Generation of Large-Scale TPC Workloads", TPC Technology Conference on Performance Evaluation & Benchmarking (TPCTC), Seattle, WA, 08/2011.  Download: paper (931.08 KB)
Sanchez, D., and C. Kozyrakis, "Vantage: Scalable and Efficient Fine-Grain Cache Partitioning", International Symposium on Computer Architecture (ISCA), San Jose, CA, 06/2011.  Download: paper (753.6 KB); slides (1.74 MB)
Delimitrou, C., S. Sankar, K. Vaid, and C. Kozyrakis, "Storage I/O Generation and Replay for Datacenter Applications", IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Austin, TX, 04/2011.  Download: paper (260.56 KB)
Delimitrou, C., S. Sankar, K. Vaid, and C. Kozyrakis, "Accurate Modeling and Generation of Storage I/O for Datacenter Workloads", Exascale Evaluation and Research Techniques Workshop (EXERT), in conjunction with ASPLOS, Newport Beach, CA, 03/2011.  Download: paper (715.38 KB); slides (2.09 MB)
Casper, J., T. Oguntebi, S. Hong, N. G. Bronson, C. Kozyrakis, and K. Olukotun, "Hardware acceleration of transactional memory on commodity systems.", ASPLOS: ACM, pp. 27-38, 2011.  Download: paper (1.22 MB)
Talbot, J., R. M. Yoo, and C. Kozyrakis, "Phoenix++: Modular MapReduce for Shared-memory Systems", Proceedings of the Second International Workshop on MapReduce and Its Applications, New York, NY, USA, ACM, pp. 9–16, 2011.  Download: paper (756.45 KB)
Hameed, R., W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B. C. Lee, S. Richardson, C. Kozyrakis, and M. Horowitz, "Understanding Sources of Ineffciency in General-purpose Chips", Commun. ACM, vol. 54, no. 10, New York, NY, USA, ACM, pp. 85–93, 2011.  Download: paper (2.83 MB)
2010
Hong, S., T. Oguntebi, J. Casper, N. Bronson, C. Kozyrakis, and K. Olukotun, "EigenBench: A Simple Exploration Tool for Orthogonal TM Characteristics", IEEE Intl. Symposium on Workload Characterization (IISWC), Atlanta, GA, 12/2010.  Download: paper (914.55 KB)
Sanchez, D., and C. Kozyrakis, "The ZCache: Decoupling Ways and Associativity", Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'43), Atlanta, GE, 12/2010.  Download: paper (276.4 KB); slides (752.04 KB)
Michelogiannakis, G., D. Sanchez, W. J. Dally, and C. Kozyrakis, "Evaluating Bufferless Flow Control for On-Chip Networks", Proceedings of the 4th ACM/IEEE international symposium on Networks-on-Chip (NOCS-2010), 05/2010.  Download: paper (158.51 KB); slides (897.85 KB)
Sanchez, D., G. Michelogiannakis, and C. Kozyrakis, "An Analysis of Interconnection Networks for Large Scale Chip-Multiprocessors", ACM Transactions on Architecture and Code Optimization (TACO), vol. 7, no. 1, 04/2010.  Download: paper (1.7 MB)
Sanchez, D., R. M. Yoo, and C. Kozyrakis, "Flexible Architectural Support for Fine-Grain Scheduling", Proceedings of the 15th international conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XV), 03/2010.  Download: paper (433.69 KB); slides (354.52 KB)
Oguntebi, T., S. Hong, J. Casper, N. G. Bronson, C. Kozyrakis, and K. Olukotun, "FARM: A Prototyping Environment for Tightly-Coupled, Heterogeneous Architectures.", FCCM: IEEE Computer Society, pp. 221-228, 2010.  Download: paper (1.05 MB)
Baek, W., N. G. Bronson, C. Kozyrakis, and K. Olukotun, "Implementing and Evaluating a Model Checker for Transactional Memory Systems.", ICECCS: IEEE Computer Society, pp. 117-126, 2010.  Download: paper (286.35 KB)
Baek, W., N. G. Bronson, C. Kozyrakis, and K. Olukotun, "Implementing and evaluating nested parallel transactions in software transactional memory.", SPAA: ACM, pp. 253-262, 2010.  Download: paper (449.46 KB)
Baek, W., N. G. Bronson, C. Kozyrakis, and K. Olukotun, "Making nested parallel transactions practical using lightweight hardware support.", ICS: ACM, pp. 61-71, 2010.  Download: paper (985.03 KB)
Kozyrakis, C., A. Kansal, S. Sankar, and K. Vaid, "Server Engineering Insights for Large-Scale Online Services", IEEE Micro, vol. 30, no. 4, Los Alamitos, CA, USA, IEEE Computer Society Press, pp. 8–19, 2010.  Download: paper (496.53 KB)
Hameed, R., W. Qadeer, M. Wachs, O. Azizi, A. Solomatnikov, B. C. Lee, S. Richardson, C. Kozyrakis, and M. Horowitz, "Understanding Sources of Inefficiency in General-purpose Chips", Proceedings of the 37th Annual International Symposium on Computer Architecture, New York, NY, USA, ACM, pp. 37–47, 2010.  Download: paper (455.9 KB)
2009
Slowinska, A., and H. Bos, "Pointless Tainting?: Evaluating the Practicality of Pointer Tainting", Proceedings of the 4th ACM European Conference on Computer Systems, New York, NY, USA, ACM, pp. 61–74, 2009.  Download: paper (339.12 KB)
2007
Njoroge, N., J. Casper, S. Wee, Y. Teslyar, D. Ge, C. Kozyrakis, and K. Olukotun, "ATLAS: a chip-multiprocessor with transactional memory support", Proceedings of the conference on Design, automation and test in Europe, San Jose, CA, USA, EDA Consortium, pp. 3–8, 2007.  Download: atlas_date_07.pdf (736.86 KB)
2006
Zmily, A., and C. Kozyrakis, "Block-aware instruction set architecture", ACM Trans. Archit. Code Optim., vol. 3, no. 3, New York, NY, USA, ACM, pp. 327–357, 2006.  Download: p327-zmily.pdf (526.99 KB)