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Contact Information
Address:
Gates Building Rm 448
353 Serra Mall,
Stanford, CA, 94305
E-mail:
liaos at stanford.edu |
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Last Modified: Sept. 2010 |
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Research Areas
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High speed links modelling via AMS
Optical Transceivers on DRAM
Currently working on a high performance ADC for high speed link frontends
... under construction ...
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Presentations
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"THz Baseband (10GHz) Analog Signal Processing Circuit," Texas Instruments Co-op Design Review, September 2010.
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"Model-First Mixed Signal Design Methodology," Texas Instruments Co-op Tech Talk, July 2010.
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"Designing a 10Gs/s 8-bit ADC Using Model-First Methodologies," Stanford "Rethinking Analog Design" Review Meeting, November 2009.
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"Thinking About an Optical Memory Interface," Stanford "Rethinking Analog Design" Review Meeting, May 2009.
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Publications
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M. Horowitz et al., "Fortifying Analog Models with Equivalence Checking and Coverage Analysis," in Design Automation Conference, June 2010, pp.425-430.
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