James Balfour[e-mail: jbalfour :at: stanford :dot: edu ] |
|
Research
My primary areas of research are computer systems architecture and VLSI design. My research focuses on architectures for energy-efficient high-performance computer systems, and includes circuits, compilers, and runtime environments for these systems.
I am presently a member of the Concurrent VLSI Architecture group in the Computer Systems Laboratory at Stanford University, where I work on the ELM project.
Education
Ph.D. Electrical Engineering, Stanford University [Autumn 2009]
M.S. Electrical Engineering, Stanford University [2006]
B.A.Sc. Electrical Engineering, Simon Fraser University [2002]
Curriculum Vitae
Research Statement
Teaching Statement
Publications
Michael D. Linderman, James Balfour, Teresa H. Meng, and William J. Dally, “Embracing Heterogeneity—Parallel Programming for Changing Hardware” Proceedings of First USENIX Workshop on Hot Topics in Parallelism (HotPar'09), March 2009.
George Michelogiannakis, James Balfour, and William J. Dally, “Elastic-Buffer Flow Control for On-Chip Networks” Proceedings. International Symposium on High-Performance Computer Architecture, February 2009.
William J. Dally, James Balfour, David Black-Shaffer, James Chen, R. Curtis Harting, Vishal Parikh, Jongsoo Park, and David Sheffield “Efficient Embedded Computing” IEEE Computer, July 2008.
David Black-Schaffer, James Balfour, William J. Dally, Vishal Parikh, and Jongsoo Park, “Hierarchical Instruction Register Organization” IEEE Computer Architecture Letters, Volume 7 Issue 2, July 2008.
James Balfour, William J. Dally, David Black-Schaffer, Vishal Parikh and JongSoo Park, “An Energy-Efficient Processor Architecture for Embedded Systems” IEEE Computer Architecture Letters, Volume 7 Issue 1, January 2008.
John Kim, James Balfour and William J. Dally, “Flattened Butterfly: Cost-Efficient Topology for High-Radix Networks” Proceedings. International Symposium on Microarchitecture (MICRO), December 2007.
John Kim, James Balfour and William J. Dally, “Flattened Butterfly Topology for On-Chip Networks” IEEE Computer Architecture Letters, Volume 6 Issue 2, July 2007
JongSoo Park, Sung-Boem Park, James Balfour, David Black-Schaffer, Christos Kozyrakis, William J. Dally, “Register Pointer Architecture for Efficient Embedded Processors” Proceedings of the conference on Design, Automation and Test in Europe (DATE), April 2007.
James Balfour and William J. Dally, “Design Tradeoffs for Tiled CMP On-Chip Networks” Proceedings. ACM International Conference on Supercomputing (ICS), June 2006.
Contact Information
Computer Systems Laboratory
Gates Room 212
Stanford, CA 94305