Publications

Filters: Author is Olukotun, Kunle  [Clear All Filters]
2004
Hammond, L., V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun, "Transactional Memory Coherence and Consistency", Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA), Munich, Germany, pp. 102–, 6/2004.
2007
Njoroge, N., J. Casper, S. Wee, Y. Teslyar, D. Ge, C. Kozyrakis, and K. Olukotun, "ATLAS: a chip-multiprocessor with transactional memory support", Proceedings of the conference on Design, automation and test in Europe, San Jose, CA, USA, EDA Consortium, pp. 3–8, 2007.  Download: atlas_date_07.pdf (736.86 KB)
2010
Baek, W., N. G. Bronson, C. Kozyrakis, and K. Olukotun, "Implementing and Evaluating a Model Checker for Transactional Memory Systems.", ICECCS: IEEE Computer Society, pp. 117-126, 2010.  Download: paper (286.35 KB)
Hong, S., T. Oguntebi, J. Casper, N. Bronson, C. Kozyrakis, and K. Olukotun, "EigenBench: A Simple Exploration Tool for Orthogonal TM Characteristics", IEEE Intl. Symposium on Workload Characterization (IISWC), Atlanta, GA, 12/2010.  Download: paper (914.55 KB)
2011
2012
2016
Prabhakar, R., D. Koeplinger, K. J. Brown, H. J. Lee, C. D. Sa, C. Kozyrakis, and K. Olukotun, "Generating Configurable Hardware from Parallel Patterns", Twenty First International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Atlanta, GA, 04/2016. Abstract  Download: paper (582.67 KB)
Koeplinger, D., R. Prabhakar, Y. Zhang, C. Delimitrou, C. Kozyrakis, and K. Olukotun, "Automatic Generation of Efficient Accelerators for Reconfigurable Hardware", The 43rd International Symposium on Computer Architecture (ISCA), Seoul, South Korea, 06/2016. Abstract  Download: paper (2.77 MB)
2017
Prabhakar, R., Y. Zhang, D. Koeplinger, M. Feldman, T. Zhao, S. Hadjis, A. Pedram, C. Kozyrakis, and K. Olukotun, "Plasticine: A Reconfigurable Architecture For Parallel Patterns", ISCA '17: 44th International Symposium on Computer Architecture, Toronto, Canada, 06/2017. Abstract  Download: paper (1.53 MB)