Course description: EE382A provides in-depth coverage of fundamental architecture and implementation techniques for modern processors. It covers topics such as advanced pipelining, wide instruction fetch, branch prediction, out-of-order and speculative execution, memory disambiguation, vector processors, GPUs, simultaneous multithreading, and support for on-chip parallelism. The students will become familiar with complex trade-offs between performance-power-complexity and the common techniques for addressing them in historical and modern processors. A central part of EE382A is a group project on an open research question. EE382A assumes a solid background on basic computer organization (EE108B), advanced memory hierarchies and system-level architecture issues (EE282), and cache-coherent shared-memory systems. EE108B is a required prerequisite, while EE282 and CS315a are recommended but not required.
Lecture: Monday
& Wednesday,
Discussion Session:
Friday,
Instructor:
Christos
Kozyrakis (christos@ee.stanford.edu)
Gates Hall Room
304
(650) 725-3716
office hours: TBD
Teaching Assistant: Daniel Sanchez (sanchezd@stanford.edu)
Gates Hall Room 354
office hours: by appointment
Note on office hours: visit the class webpage regularly for the last office hours schedule.
Administrative Support: Teresa Lynn (tlynn@csl.stanford.edu), 305 Gates Hall, (650) 724-6540
Class Webpage: http://eeclass.stanford.edu/ee382a/
Visit
the web page regularly. All the handouts and announcements will be available on-line.
You will need to register with the webpage in order to obtain on-line access to
grades and homework solutions. Follow the “students” link on the left bar of
the page.
Class Mailing-list:
Registered students will be automatically added to the class-mailing
list. The list will be used only for announcements by the class staff. Announcements
will also be available at the class newsgroup and webpage.
Policy on Questions & Emails: The preferred method for asking questions is through the bullettin board, accessible through the class webpage . We will check the newsgroup regularly, especially close to assignment deadlines. All answers will be posted on the newsgroup and will be mailed to the person that posted the original question. When posting a question to the newsgroup, make sure you use an appropriate subject. For example, if your questions refers to the definition of memory latency in problem 2 of homework 1, an appropriate subject would be "HW1, problem 2: definition of memory latency".
Before posting a question on the newsgroup check to see if this question has already been answered. We will not answer the same question multiple times! Take advantage of the search capabilities of newsgroup viewers such as Eudora and Outlook Express. In addition, check the FAQ section of the webpage description for homework assignments.
For
questions that are not appropriate for posting to the newsgroup, you can email
the TA or the instructor directly. Write “ee382A” at the beginning of the email
subject. Note that grades are accessible through the class web page
(registration required).
Handouts:
All the handouts will be available in electronic form at the class web page.
Paper handouts will be available at the classroom and in a lobby filling cabinet
at Gates Hall 3rd floor. The lecture notes will be typically posted
on the web page a couple of hours before the lecture. Paper copies will
typically be
available in the classroom.
Prerequisites
& Registration:
EE108b (Digital Systems II)
or EE182 (Computer Organization & Design) or equivalent
at other institutions. You are expected to understand basic processor
core
design (pipelined processors) and advanced topics on system
architecture (cache
hierarchies, memory systems, IO, OS support). EE282 and CS315a are not required
prerequisites, but are strongly recommended. You are expected to
understand cache-coherent shared-memory systems.
Registration to
EE382A is limited to
30 students. The class is appropriate for Ph.D. students working in
computer
systems (architecture, compilers, OS, design) and advanced
practitioners. All students will be have to receive final approval from
the
instructor based on a questionnaire (HW1) available in the first
lecture. Same
rules apply for SCPD students.
Required Textbook: J.P. Shen and M. Lipasti, "Modern Processor Design: Fundamentals of Superscalar Processors", 1st edition, McGraw-Hill.
Optional Textbooks: J. Hennessy and D. Patterson (H&P), "Computer Architecture: a Quantitative Approach", 4th edition, Morgan Kaufmann Publishers; D. Patterson and J. Hennessy (P&H), "Computer Organization and Design: the Hardware/Software Interface", 4th edition, Morgan Kaufmann Publishers.
Additional
Exams: There will be one (midterm) exam, Wed 5/13th, 3-6pm, on Herrin Hall T195. It will cover all lectures up to that point. Bring a calculator. Alternative exam times will not be available to any students. If you cannot take the exam on the specified date, you should probably not take the class. The class has no final.
Discussion Sessions:
There will be several review session. All session
will be held on Fridays (2.15pm - 3.05pm, Gates B01, channel E3). The schedule will be announced on the webpage.
Homework:
There will be 2 homework sets . All assignments are due by
Late Assignments and Regrading: All deadlines are final. No extensions, no exceptions. Late assignments will not be accepted and the grade “zero” will be given automatically. Requests for regarding must be submitted within a week from grade assignment date. Submit a note that describes the specific grading complaint and your assignment manuscript. However, regrading will affect the whole homework/exam (not just one question) and can lead to a lower grade than the original one.
Project: EE382a includes a project on an open research question related to computer architecture. The project will include a proposal, a status review, a final presentation, and a final paper.
Collaboration:
You will work on homework and project in groups of 3 students. Groups with less than 3 students
will only be allowed after the instructor's
permission. In general, collaboration is encouraged subject to the following
guidelines:
No more than three (3) people can collaborate on a homework or project solution.
Groups of people working together should submit a single homework solution for the group.
Any assistance
received in the solution of a homework assignment should be acknowledged in
writing on the homework assignment.
You
should also read the extensive note about the honor
code and accepted forms of collaboration in general.
Grading (tentative):