Stanford EE Computer Systems Colloquium

4:15PM, Wednesday, April 27, 2011
HP Auditorium, Gates Computer Science Building B01
http://ee380.stanford.edu

Carbon Nanotube Imperfection-Immune Digital VLSI

Subhasish Mitra
Deptartment of EE and Department of CS, Stanford University
About the talk:

Carbon Nanotube Field Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient electronic systems of the future. Despite significant progress at a single-device level, fundamental limitations inherent to carbon nanotubes (CNTs) pose major obstacles to the realization of robust CNFET digital VLSI:

Today's CNT processing alone is inadequate to overcome these challenges. A combination of design and processing techniques, presented in this talk, enables CNFET digital VLSI circuits that are immune to these inherent imperfections. Our imperfection-immune design techniques retain the energy efficiency benefits of CNFETs, and are compatible with VLSI processing and design flows. These techniques enable the first experimental demonstration of:

Slides:

Download the slides for this presentation in PDF format.

About the speaker:

Professor Subhasish Mitra directs the Robust Systems Group in the Department of Electrical Engineering and the Department of Computer Science of Stanford University. Before joining Stanford, he was a Principal Engineer at Intel Corporation.

Prof. Mitra's research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies. His X-Compact technique for test compression has been used in more than 50 Intel products, and has influenced major CAD tools. The IFRA technology for post-silicon validation, created jointly with his student, was characterized as a breakthrough in the Communications of the ACM. His work on the first demonstration of carbon nanotube imperfection-immune VLSI circuits, jointly with his students and collaborators, was selected by NSF as a Research Highlight to the US Congress, and was highlighted as a significant breakthrough by the Semiconductor Research Corporation and the MIT Technology Review.

Prof. Mitra's major honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the highest US honor for early-career outstanding scientists and engineers, ACM SIGDA Outstanding New Faculty Award, IEEE CAS/CEDA Pederson Award for the IEEE Transactions on CAD Best Paper, IEEE/ACM Design Automation Conference Best Paper Award, Terman Fellowship, and the Intel Achievement Award, Intel's highest corporate honor. At Stanford, he was honored multiple times by graduating seniors for being important to them during their time at Stanford. Prof. Mitra also serves as an invited member on DARPA's Information Science and Technology Board.

Contact information:

Subhasish Mitra
Gates 333
Stanford, CA, 94305.

650-724-1915

subh@stanford.edu