Architectural tradeoffs in the Sea Micro SM 10000 Server

Gary Lauterbach
Seamicro

The SM10000 High Density, Low Power Server consumes one fourth the power and takes one fourth the space of today's best in class volume server. Designed to replace 40 1 RU servers, the SM10000 integrates 512 independent ultra low power Intel Atom processors, top rack switching, load balancing, and server management in a single 10 RU system, 2048 CPUs/rack.

• 1.28 Terabit interconnect fabric
• Up to 64 1 Gbps or 16 10 Gbps uplinks
• 0-64 SATA SSD/Hard disk
• Integrated load balancing, Ethernet switching, and server management
• Uses less than 2 KW of power

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About the speaker:

Gary Lauterbach is a Founder and Chief Technology Officer of SeaMicro. Gary brings 30 years of experience in the computer industry to SeaMicro. Most recently, at AMD, Gary was an AMD Fellow and one of five lead architects defining AMD's next generation high performance X86 processor. Prior to AMD, Gary was a Distinguished Engineer at Sun Microsystems for 12 years where he was Chief Architect of the Ultra-SPARC III and Ultra-SPARC IV microprocessors. At Sun Laboratories, he was Chief Architect of the DARPA HPCS peta-scale computing project where his innovative super computer architecture enabled Sun to win $50 million in funding from DARPA. Over the course of his career, Gary has designed and constructed operating system kernels, CAD tools, microprocessors, computer systems and radio-frequency receivers, and transmitters. Gary holds more than 35 issued patents in the areas of computing systems, processors, packaging technology, process control, and software algorithms.

Contact information:

Gary Lauterbach
SeaMicro