As programmable hardware matures into a competitive platform for computation, we are faced with the opportunity to optimize the number representations possibly for each variable of our programs. Dynamically, we can even adapt the number representation to input data and phases of the program.
Adapting the number representation consists of two parts: (1) the encoding, and (2) the number of bits used to represent the values. We are here not limited to standard encodings such as integer or IEEE floating point, but can adapt the encoding to the function that is being computed. The second step is then to find the precision requirement which we can accomplish, for example, via automatic differentiation of the program.
This research is enabled by ASC, A Stream Compiler, which provides a hardware programming environment for FPGAs. The programmer gets access to the programmable hardware on the algorithm level, but also on the architecture, arithmetic and gate levels, all within a single C++ program. As a consequence, ASC combines the performance of hand designed circuits with the productivity of the software development process.
About the speaker:
Oskar Mencer teaches at Imperial College in London and, on the side, runs Maxeler Technologies, a startup commercializing ASC technology. (See http://www.maxeler.com for information about Maxeler Technolgies.)
He received his Ph.D. and M.S. in Electrical Engineering from Stanford University in 2000 and 1997 respectively, and a B.S. degree in Computer Engineering from the Technion/Israel in 1994. His research interests span computer architecture, computer arithmetic, VLSI microarchitecture, CAD and reconfigurable (custom) computing. More specifically, he is interested in improving the programmability of FPGAs and making the compute power of reconfigurable computers accessible to the computer science community.
Contact information:
Oskar Mencer
Imperial College
oskar@doc.ic.ac.uk