About the Talk:
BRASS Project
Reconfigurable architectures, such as FPGAs, represent a very different point in the space of general-purpose, post-fabrication programmable architectures than traditional programmable processors, such as RISC CPUs. In terms of application efficiency, this point is complimentary to traditional processors---that is, applications which are most efficient on reconfigurable architectures are very inefficient on processors and vice-versa. Simply put, the reconfigurable architectures implement computations by building spatial dataflow tailored to the application and exploiting parallelism at several levels. Processors, in contrast, sequence through a series of sequential operations all on a few wide-word processing elements. When the critical portions of an application fit entirely into the space available for spatial dataflow, the reconfigurable architecture can often offer large advantages in processing performance over the processor. As we go to 100M- and 1G-transistor processing devices, the critical portions of more and more tasks will fit conveniently into the available space and benefit from reconfigurable implementation.
The Berkeley Reconfigurable Architectures, Systems, and Software (BRASS) Group is studying how to make general-purpose computing systems exploiting these reconfigurable architectures. The focal architecture for the group is a hybrid component which tightly couples a RISC CPU with a reconfigurable array in order to bring the best characteristics of both architecture points together into a coherent system component.
In this talk, I will start by motivating the interest in reconfigurable architectures in general and our hybrid design point in particular. In the latter half of the talk, I will highlight some of the BRASS group's early results and ongoing research.
About the speaker:
André DeHon received S.B. (1990), S.M. (1993), and Ph.D. (1996) degrees from M.I.T. He is currently a visiting postdoctoral research engineer at the University of California at Berkeley where he is helping run the BRASS project. His research interests span computer system from transistors up through applications including computer architecture, VLSI, interconnection networks, parallel computation, compilation technology, operating and run-time systems, and CAD. His current research is centered around reconfigurable computing and architectures.
Contact Data:
André DeHon
e-mail: andre@acm.org
web: http://www.cs.berkeley.edu/~amd/
BRASS Project: http://www.cs.berkeley.edu/projects/brass/