;*****************************************************************
;
; File Name		: 'timer0.asm'
; Title			: Example Timer 0 code
; Author		: Pascal Stang
; Date			: 10/03/2001
; Version		: 0.1
; Target MCU		: AT90S8515
;
; This program demonstrates using timer 0 in interrupt mode.
; The "run" loop below simply ex-or's the pushbuttons with the
; register called CHASEREG, and then outputs CHASEREG to the LEDs.
;
; This would be rather boring except for the fact than timer 0
; happens to be running, and it's overflow interrupt is enabled.
; When overflow occurs, timer 0 calls Timer0Isr.  Each time 
; Timer0Isr is called, it rolls the bit in CHASEREG to the left
; creating a "chasing" effect with the LEDs.
;
; Thanks to the timer, the chasing effect always advances 14 times
; per second regardless of what the main "run" loop is doing,
; and it requires no software delay loops.
;
;*****************************************************************

.nolist
.include "8515def.inc"
.list

; TIMER0 clock will be set to CK/1024
; if we have a CK of 3.68MHz then timer 0 will tick at
; 3.68MHz/1024 = 3594Hz
; Since the interrupt is triggered on timer 0's overflow
; (in otherwords, every time timer 0 rolls over from 255 to 0)
; the interrupt rate is
; 3594Hz/256 = 14Hz
.equ    TMR0_PRESCL	=0x05	; this is the prescaler setting for CK/1024

; define various CPU registers with my own names
; so that my code appears more readable
.def	TIMEREG0	=r15
.def    TEMP0   	=r16
.def	CHASEREG	=r17

; setup reset/interrupt vectors
        .cseg			; begin code segment
        .org    0x000		; start at program address 0x000

; here we direct all interrupts to reset
; except for the overflow interrupt of Timer0
	rjmp	reset		; $000 HW reset or watchdog
	rjmp	reset		; $001 External IRQ 0
	rjmp	reset		; $002 External IRQ 1
	rjmp	reset		; $003 Timer/Counter1 capture event
	rjmp	reset		; $004 Timer/Counter1 compare match A
	rjmp	reset		; $005 Timer/Counter1 compare match B
	rjmp	reset		; $006 Timer/Counter1 overflow
	rjmp	Timer0Isr	; $007 Timer/Counter0 overflow
	rjmp	reset		; $008 SPI/SCT serial transfer complete
	rjmp	reset		; $009 UART Rx complete
	rjmp	reset		; $00A UART data register empty
	rjmp	reset		; $00B UART Tx complete
	rjmp	reset		; $00C Analog comparator

; begin main code

reset:
; setup stack (Interrupts will cause program execution to be
; interrupted at unknown positions in the code.  We need the stack to
; store the state of the processor when the interrupt happened, so that
; regular execution can continue when we return from the interrupt handler.

	ldi 	TEMP0, low(RAMEND)	; initialize stack pointer
	out	SPL, TEMP0
	ldi 	TEMP0, high(RAMEND)
	out 	SPH, TEMP0
; initialize LEDs
	ldi	TEMP0, $FF		; load 0xFF into TEMP0
	out	DDRB, TEMP0		; set port B to all outputs
        out     PORTB, TEMP0            ; initially set all LEDs to off
; initialize pushbuttons
	ldi	TEMP0, $00		; load 0x00 into TEMP0
	out	DDRD, TEMP0		; set port D to all inputs
; initialize timer 0
	ldi	TEMP0, TMR0_PRESCL	; set timer 0 prescaling
	out	TCCR0, TEMP0		;
	clr	TEMP0			; clear timer 0
	out	TCNT0, TEMP0		;
; setup timer 0's overflow interrupt 
	in	TEMP0, TIMSK		; load Timer Interrupt Mask register
	sbr	TEMP0, 1<<TOIE0		; set the timer 0 ovfl intr enable bit
	out	TIMSK, TEMP0		; save Timer Interrupt Mask register
; initialize chase register
	ldi	CHASEREG, 0xFE		; load binary 11111110 into CHASEREG
; start/enable interrupts	
	sei				; enable interrupts
	
run:
	in	TEMP0, PIND		; Read buttons from port D (active low)
	com	TEMP0			; complement (invert the bits of) TEMP0
	eor	CHASEREG, TEMP0		; exclusive-or TEMP0 with CHASEREG
	out	PORTB, CHASEREG		; Output value of CHASEREG to LEDs (active low)
	rjmp	run			; Run forever
; end main code





; begin routines 

; Timer0 interrupt handler (or interrupt service routine, ISR)
; This routine will be automatically called whenever timer 0 overflows
Timer0Isr:
	push	TEMP0			; save registers
	in      TEMP0, SREG		; save status register
; above, I make "backups" of any registers
; I that I intend to modify inside the
; handler code because the normal code
; doesn't know it has been interrupted.
; We also need to backup the Status Reg
	rol	CHASEREG		; roll CHASEREG bits once to the left
; here we restore the original value
; of TEMP0 that we pushed to the stack
	out	SREG, TEMP0		; restore status register
	pop 	TEMP0			; restore registers
	reti				; return from the interrupt