EE108A: Digital Systems I
HomeSchedule and HandoutsResourcesWikiEEClass

Times and Locations

Lecture

Mon/Wed 11-12:15PM
History Corner / Building 200, room 303

Labs

Weekly 3 hours
Lab Times & Partners
Packard 127

Section

One hour on Friday
Section Times and Rooms
Packard 127

Staff

Instructor

Professor William J. Dally
dally at stanford edu
Phone (650) 725-8945
OH: Mon/Wed 3PM-4PM
  except as noted in
 any announcements
Gates 301 / Gates 276

Teaching Assistants

Mark Baybutt
mbaybutt at stanford dot edu
OH: Tuesday 11:00-1:00pm,
 Thursday 11:00-1:00pm
Packard 127

Brandon Nefcy
nefcy at stanford dot edu
OH: Tuesday 2:00-4:00pm,
 Sunday 4:30-6:30pm
Packard 127

Section Leaders

Cihan Baran
cihanb at stanford dot edu
OH: Monday 3:30-5:00pm
 Sunday 1:30-3:00pm
Packard 127

Ian Dimen
idimen at stanford dot edu
OH: Tuesday 5:30-7:00pm,
 Sunday 6:30-8:00pm
Packard 127

Ryan Torres
ryant at stanford dot edu
OH: Tuesday 4:00-5:30pm,
 Sunday 3:00-4:30pm
Packard 127

Administrator

Uma Mulukulta
uma at cs dot stanford dot edu
650-725-3726
Gates 303

Announcements

09/25/08Lab times and section assignments are updated, hopefully with no more changes. Check your section times especially and please attend!
09/23/08Tentative lab times and parnters have been posted. Check the lab assignments page for the for your group and time. If you did not fill out the form for lab time preferences, please do so ASAP and turn it in to the course staff. Without this form we will assume you are not taking the class.
09/19/08Welcome to EE108A! Please check the schedule page for the for the first readings.

Course Description

EE 108A is an introduction to digital circuits and their applications. Topics covered in lecture are explored in weekly laboratory assignments and a three-week final project. Lecture topics include:

The lab in Packard 127 has seven stations, each with a Pentium 4 PC, a C.A.D.E.T. board from E&L Instruments, an HP 54601 digital oscilliscope, an HP 3312 function generator, and a Xilinx Virtex-II Pro XC2VP30 FPGA board.

Students implement their designs during weekly lab sessions, using Xilinx ISE software, simulate using Modelsim, and test them on the FPGA boards. Labs lead students to interface with SDRAM, VGA output and audio output.

Grading

Text and Readings

There is no required text. The course will be taught from class notes handed out periodically throughout the quarter. Readings assigned for a particular day should be completed before the start of class on that day.

Other Logistics

For more administrivia, see the schedule and course policy.